Coleman’s Core

AT91SAM9 Linux Watchdog

June 14, 2008 – 12:32 pm

A driver for the AT91SAM9 watchdog timer was introduced in Linux v2.6.23.  Unfortunately, there are some “issues” with this driver that prevent it from working in all cases. Specifically, in my case, the AT91SAM9260 would not boot from the Dataflash when the watchdog faulted and caused a CPU reset.The issues and my proposed solutions follow.

1) The default at91bootstrap code disables the watchdog functionality.

In at91bootstrap, in at91sam9260ek.c, in the hw_init function, remove the line that disables the watchdog and replace it with a line that pats the dog as follows:

/* Disable watchdog */
/*writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);*/
writel(AT91C_WDTC_WDRSTT|AT91C_WDTC_KEY, AT91C_BASE_WDTC + WDTC_WDCR);  /* pat the dog early */

Recompile at91bootstrap and load it using SAM-BA or whatever tool you use to flash this to your board. 

2) The Linux driver didn’t set the watchdog up to reset the peripherals.  This means that when the watchdog faulted and reset the CPU, the peripherals (DataFlash in this case) weren’t being set to a good state.  In order to do this, the WDRPROC bit in the watchdog timer register has to be set to 1. 

3) The external reset length (ERSTL) bits in the reset controller (RSTC) mode register weren’t being set to a number that allowed the SAM9260 ROMboot to detect the presence of the DataFlash upon reboot. 

Basically, ROMboot tries 3 boot methods:

1) boot from DatafFlash on chip select 0 (CS0), timeout after “< 1 sec.”

2) boot from DataFlash on chip select 1 (CS1), timeout after “< 1 sec.”

3) boot from NAND flash, timeout “1 sec Typ.”

4) if all else fails, try USB enumeration and boot to SAM-BA

In my case, the 9260 was only booting to the ROMboot> prompt and going no further and wasn’t detected by SAM-BA.  Dialog with others who’ve used this driver with NAND flash led me to believe that this issue only occurred when booting from DataFlash. 

To keep from boring you with the ugly details, it turned out that having a long ERSTL is a Bad Thing^® when booting from DataFlash, because the CPU doesn’t detect the DataFlash as long as the NRST pin is asserted.  So, if the ERSTL is set to 2 seconds (it’s maximum value), steps 1 and 2 above would both timeout since the NRST is asserted for 2 seconds and ROMboot would try to detect the NAND flash.

To resolve this, I set the ERSTL to assert for 512 milliseconds (i.e. supplied a value of 8 in the ERSTL bits since ERSTL is calculated as 2^(ERSTL+1).  It could be set to a lower value, say 256 milliseconds, but 512 works just fine for me.

4) The reset controller (RSTC) mode register has to be set to perform a user reset on the detection of a low level (assertion) of the NRST pin.  This is done by setting the URSTEN (User Reset Enable) bit to 1. 

I created a patch to correct issues 2 - 4 as long as CONFIG_MTD_DATAFLASH is enabled in your kernel’s .config.

Also note that I’ve modified the kernel a bit to achieve a 14 sec. boot time since I always boot from a certain image type and it doesn’t need to check for the non-existent type.  This shaves at least 5 seconds of boot time.  So, you may need to put code in the kernel to pat the dog else you’ll never get to a prompt since the watchdog faults in 16 seconds by default. 

Edit:  The patch is available at http://www.jandasoft.biz/files/patches/AT91SAM9260/2.6/sam9_watchdog.patch

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